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Chipset

North & South Bridge

The PCI bus (see next section) requires a pairs of chips to manage communication between parts of a PC.  These chips are known as the North Bridge (ormemory controller) and South Bridge (or I/O controller).

The bridges are collectively known as the motherboard chipset (a term that sometimes includes the CPU) and this chipset forms the heart of a modern motherboard.  Some chipsets include extra facilities, such as onboard graphics or wireless networking (e.g. Intel's Centrino chipset).

Older desktop Pentium designs feature a three-chip chipset: the third IC interfaces the ISA bus to the PCI bus.

Early bus architecture

ISA

Industry Standard Architecture (ISA) was the original PC bus.  Initially it carried an 8-bit data bus signal (synchronised to a 4MHz clock).  When the AT was introduced this was widened to 16 bits at 8MHz.

Attempts to improve or replace ISA

When IBM released its PS/2 in 1987 it tried to introduce a major redesign: the MicroChannel Architecture (MCA) bus.  This 16 / 32 bit design was completely incompatible with ISA and failed to catch on.

Extended ISA (EISA) used taller slots to extend the system to a 32-bit data bus (still at 8MHz) but it was not widely supported.

Graphics cards used the Video Electronics Standards Association (VESA) local bus extension.  This extended the ISA slot to create a 32-bit, higher-speed bus.

PCI bus

How the PCI bus operates

The Peripheral Component Interconnect (PCI) local bus design creates a main data highway between the processor and other devices.



PCI expansion cards are configured by the motherboard's PnP (plug 'n' play) system, allocating resources (IRQ, I/O address) automatically.  The PCI bus operates its own DMA controller, allowing large quantities of data to be transferred quickly between devices without the CPU's involvement.



Originally the PCI expansion slots were at the heart of the PCI bus but this shifted to the south bridge as manufacturers introduced dedicated north-south bridge local buses (as illustrated on the Intel i810E chipset above).

The important thing about the PCI bus is that it is independent of the CPU's system bus; it can expand to accommodate new processor designs and new peripherals.  The bus transfers 132 MBps using a 32-bit bus and 264 MBps using a 64-bit bus by subdividing the main bus clock (33MHz).

There are a number of different version numbers of PCI, which refer to speed improvements.  When selecting PCI cards it is important to ensure that the versions match for maximum compatibility and speed.

The connection between north bridge and CPU is along a front-side bus (FSB).  Alternative designs, such as HyperTransport, offer very fast connection between the north bridge and CPU.

AGP

Accelerated Graphics Port (AGP) modified the PCI bus design to handle the high data traffic associated with three-dimensional graphics.

AGP provides a 32-bit video channel that runs at 66MHz in basic 1X video mode.  AGP also supports three high-speed modes that include 2X (5.33 MBps),4X (1.07 GBps), and 8X (2.1 GBps).

AGP provides a direct channel between the AGP graphic controller and the system's main memory, instead of using the expansion buses for video data.  This removes the video data traffic from the PCI buses.  The speed provided by this direct link permits video data to be stored in system RAM instead of in special video memory.

8X employs a lower supply voltage (0.8) than the 2X and 4X specifications.  When upgrading an AGP card or system board containing an AGP slot, you should always consult the system board and AGP adapter card's documentation to verify their compatibility with each other.

AMR & CNR

Audio Modem Risers (AMR) and Mobile Daughter Card (MDC) were sometimes used to connect sounds cards and modems.  These have been replaced by a new design called the Communication and Networking Riser (CNR) card.  This includes support for V.90 modems, multi-channel audio, telephone-based dial-up networking, USB devices, and 10/100 Ethernet-based LAN adapters.



PCI Express

PCI Express (PCIe) is a major redesign that uses high-speed serial signalling arranged in lanes. This allows different sized cards to be used that may or may not require high-speed transfers.



All PCI Express slots must support x1 (single-lane) connections — so you can plug a x1 card into a x16 slot if necessary.  Smaller cards can be placed in larger slots (but larger cards cannot physically fit into smaller slots).

All interrupts and control signals are encoded into the serial data stream.

The photo below shows (top to bottom) a x4, x16, x1, x16 and a normal PCI slot.



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